1. Field of the Invention
This invention relates to a method and apparatus for the automatic inspection of periodic patterns such as memory arrays and programmable logic arrays in integrated circuit chips and the like. More particularly, this invention relates to a method and apparatus for the automatic inspection of periodic patterns in the above devices wherein the known periodicity of the pattern is used to identify defects by comparing repetitive cells in the periodic array.
2. Description of Related Art
While complex periodic patterns, such as memory arrays and programmable logic arrays in integrated circuit chips, have become increasingly smaller to effect larger data capacity in denser package designs, improved inspection techniques for the arrays have failed to be developed. Historically, and as is still the case, inspection is largely accomplished by microscopic examination of the pattern. However, this technique is extremely slow, costly, operator fatiguing and at low quality levels.
To meet this demand, many automatic inspection systems have been developed to carry out the task of inspecting complex structures by analyzing two dimensional images of those structures. In electronics manufacturing applications, these structures usually consist of complicated arrays of fairly simple geometric patterns. Examples of these are printed circuit boards (both bare and populated), masks for photolithography and patterned silicon wafers (IC chips during the manufacturing process). Most systems that perform this type of inspection use one or a combination of two approaches: image to design comparison or image to image comparison. Wherefore, it is recognized by those skilled in the art that design rule checking is not usable with patterned inspection as topographical variations and reflections due to films and edges are not incorporated.
Harris et al in "Automated Inspection of Wafer Patterns with Applications in Stepping, Projection and Direct-Write Lithography," Solid State Technology (February 1984), pp. 159-179 discloses an automated wafer inspection tool which provides three basic reference options: Wafer Reference, Standard Reference and/or Design Reference. Selected types of defects are taught to be found with these three reference options. However, no teaching as to how each inspection option works is provided.
Koniski et al in "New Technique for Inspecting Charge-Coupled Device (CCD) Wafer for Defects," SPIE, Vol. 336, Robot Vision (1982), pp. 128-132, describes a system for inspecting high density CCD wafers for surface defects.
Koniski et al technique consists of applying an edge detector to a greyscale image and then detecting defects by comparing edge points with their periodic counterparts one repetition period away. The lack of a match indicates the presence of a defect. However, the technique is quite noise sensitive and many of the details of implementation address the problem of suppressing false defect calls due to noise. The result is a technique that, is only capable of detecting defects much larger than the pixel size. Suspected defect points are found by a comparison between edge points and their counterparts one repetition period away. A suspected defect would be indicated, in this case, by a "1-10" comparison result. Using this suspected defect procedure to make the final defect determination would, however, produce unacceptably high false call rates due to noise effects, which are still present at this point in spite of the large gradient operator used.
Therefore, the use of an inherently noise sensitive technique (the gradient operator) and operations based on large neighborhoods (i.e. 5.times.5 and 8.times.8) make finding small defects difficult even in areas of uniform greylevel. Near pattern edges, finding small defects becomes impossible, especially in images of complicated multilevel patterns such as found on memory and logic circuit chips, where edges are virtually everywhere.
It is therefore an object of the present invention to provide a high speed, extremely accurate method and apparatus for the automatic inspection of complex periodic patterns in electronic manufacturing applications.